Title :
A simulation technique for evaluating analog circuits stability in the presence of reactive parasitic elements
Author :
Wong, S.C. ; Lee, Y.S. ; Tse, C.K. ; Chow, M.
Author_Institution :
Dept. of Electron. Eng., Hong Kong Polytech. Univ., Kowloon, Hong Kong
Abstract :
A simple simulation method that evaluates the stability of analog circuits in the presence of reactive parasitic elements is proposed. This method also gives the range of values and the exact locations of the parasitic elements for which a given stable circuit will be rendered oscillatory
Keywords :
analogue circuits; circuit analysis computing; circuit stability; analog circuits; oscillations; reactive parasitic elements; simulation; stability; Analog circuits; Capacitors; Circuit simulation; Circuit stability; Computational modeling; Computer simulation; Impedance; Inductance; Inductors; Parasitic capacitance;
Conference_Titel :
Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on
Print_ISBN :
0-7803-2624-5
DOI :
10.1109/TENCON.1995.496363
