DocumentCode
3536226
Title
A simulation technique for evaluating analog circuits stability in the presence of reactive parasitic elements
Author
Wong, S.C. ; Lee, Y.S. ; Tse, C.K. ; Chow, M.
Author_Institution
Dept. of Electron. Eng., Hong Kong Polytech. Univ., Kowloon, Hong Kong
fYear
1995
fDate
6-10 Nov 1995
Firstpage
163
Lastpage
166
Abstract
A simple simulation method that evaluates the stability of analog circuits in the presence of reactive parasitic elements is proposed. This method also gives the range of values and the exact locations of the parasitic elements for which a given stable circuit will be rendered oscillatory
Keywords
analogue circuits; circuit analysis computing; circuit stability; analog circuits; oscillations; reactive parasitic elements; simulation; stability; Analog circuits; Capacitors; Circuit simulation; Circuit stability; Computational modeling; Computer simulation; Impedance; Inductance; Inductors; Parasitic capacitance;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on
Print_ISBN
0-7803-2624-5
Type
conf
DOI
10.1109/TENCON.1995.496363
Filename
496363
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