Title :
Change Function of 2D/3D Network-on-Chip
Author :
Yin, Alexander Wei ; Xu, Thomas Canhao ; Yang, Bo ; Liljeberg, Pasi ; Tenhunen, Hannu
Author_Institution :
Dept. of Inf. Technol., Univ. of Turku, Turku, Finland
fDate :
Aug. 31 2011-Sept. 2 2011
Abstract :
Network-on-Chip (NoC) has been widely accepted as one of the most promising on-chip communication architectures for many-core Systems-on-Chip (SoC). With billions of transistors integrated on a single chip, inter-component communication becomes more and more complicated and power hungry. By leveraging the existing technologies of computer networks, NoC enables the on-chip communication to be simpler and more predictable. With the unceasing increase of the number of on-chip components, issues such as communication delay, system throughput, power consumption and large die area start to emerge in traditional two dimensional (2D) integrated circuits (ICs). During the recent years, more attentions than ever have been focused on three dimensional (3D) ICs in both industry and academia. However, 3D ICs are known to have higher cost in several aspects, including heat dissipation, yield, testing, etc., than their 2D counterparts. In this paper, we propose a method based on the economic term of change function to analyze the profitability of using 3D rather than 2D NoCs. We compare the benefits and costs between 2D and 3D NoCs and judgments are made based on the quantized results of these comparisons.
Keywords :
network-on-chip; three-dimensional integrated circuits; 2D network-on-chip; 3D network-on-chip; Delay; Logic gates; Metals; Program processors; Three dimensional displays; Through-silicon vias; Throughput; Cost; Network-on-Chip; System Performance;
Conference_Titel :
Computer and Information Technology (CIT), 2011 IEEE 11th International Conference on
Conference_Location :
Pafos
Print_ISBN :
978-1-4577-0383-6
Electronic_ISBN :
978-0-7695-4388-8
DOI :
10.1109/CIT.2011.38