DocumentCode
3537077
Title
VLSI realization of a 16×16 ATM switch using 1 μm CMOS technology
Author
Yeung ; Wong, P.C.
Author_Institution
Adv. Network Syst. Lab., Chinese Univ. of Hong Kong, Shatin, Hong Kong
fYear
1995
fDate
6-10 Nov 1995
Firstpage
452
Lastpage
455
Abstract
This paper describes the realization of a chipset of two VLSIs for a 16×16 ATM switch using 1 μm CMOS technology. The chipset can run up to 500 Mbps per port. The design is based on the pipeline Banyan architecture, which has the features of sequential packet delivery, low hardware complexity, and a close to 100% maximum throughput
Keywords
CMOS digital integrated circuits; VLSI; asynchronous transfer mode; field effect transistor switches; pipeline processing; switching circuits; 1 micron; 500 Mbit/s; ATM switch; CMOS technology; VLSI realization; chipset; pipeline Banyan architecture; sequential packet delivery; Asynchronous transfer mode; CMOS technology; Fabrics; Logic; Packet switching; Pipelines; Routing; Switches; Throughput; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on
Print_ISBN
0-7803-2624-5
Type
conf
DOI
10.1109/TENCON.1995.496437
Filename
496437
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