Title :
A 32-bit low power RISC core for embedded applications
Author :
Ho Kwak, Sung ; Ho Lee, Seung ; Yoon Choi, Byeong ; Key Lee, Moon
Author_Institution :
Dept. of Electron. Eng., Yonsei Univ., Seoul, South Korea
Abstract :
This paper describes a microprocessor that has been designed for embedded and portable application. This RISC processor offers very low power consumption and fast context switching. This architecture is based on RISC principles. The processor adopts 3-stage instruction execution pipeline and has achieved single cycle execution using a 2-phase 40 MHz clock. This results in a high instruction throughput and real-time interrupt response. This chip is implemented with 0.6 μm triple metal CMOS technology and consists of about 70 K transistors. The power dissipation is 140 mW
Keywords :
CMOS digital integrated circuits; microprocessor chips; parallel architectures; pipeline processing; real-time systems; reduced instruction set computing; 0.6 micron; 140 mW; 32 bit; 40 MHz; context switching; embedded applications; instruction throughput; low power RISC core; microprocessor; portable application; power consumption; real-time interrupt response; single cycle execution; three-stage instruction execution pipeline; triple metal CMOS technology; Application software; CMOS technology; Clocks; Computer architecture; Energy consumption; Microprocessors; Pipelines; Power dissipation; Reduced instruction set computing; Registers;
Conference_Titel :
Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on
Print_ISBN :
0-7803-2624-5
DOI :
10.1109/TENCON.1995.496447
