DocumentCode :
3537575
Title :
Design of a high speed reverse converter for a new 4-moduli set residue number system
Author :
Cao, Bin ; Srikanthan, Thambipillai ; Chang, Chip-Hong
Author_Institution :
Centre for High Performance Embedded Syst., Nanyang Technol. Univ., Singapore
Volume :
4
fYear :
2003
fDate :
25-28 May 2003
Abstract :
This paper presents an elegant residue-to-binary algorithm for a new 4-moduli set (2n - 1, 2n, 2n + 1, 22n + 1) Residue Number System. Our reverse conversion algorithm takes advantage of the special number properties of the proposed moduli set. The recently introduced New CRT theorem has been exploited to simplify the costly and time consuming modular corrections. The resulting architecture is notably simple and can be realized in hardware with only bit reorientation operation and a Multi-Operand Modular Adder. In terms of area-time complexity, the performance of the new reverse converter surpasses previously reported reverse converters for several celebrated four-moduli sets.
Keywords :
adders; circuit complexity; convertors; high-speed integrated circuits; integrated circuit design; residue number systems; 4-moduli set residue number system; New CRT theorem; area-time complexity; bit reorientation operation; high speed reverse converter; modular corrections; multi-operand modular adder; residue-to-binary algorithm; reverse conversion algorithm; simple architecture; Adders; Arithmetic; Cathode ray tubes; Circuits; Dynamic range; Embedded system; Hardware; Parallel processing; Signal processing algorithms; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
Type :
conf
DOI :
10.1109/ISCAS.2003.1205951
Filename :
1205951
Link To Document :
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