A fault-tolerant architecture for ATM networks

The asynchronous transfer mode (ATM) is the transfer mode recommended for B-ISDN by CCITT. In this paper, we propose a self-routing fault-tolerant switching architecture for ATM networks. The proposed architecture uses subswitches and extra links to provide many alternative paths, and hence can tolerate multiple faults. Analytical results show that the number of redundant paths increases exponentially as the size of the network increases. A simulation model is developed to study both the reliability and She performance of the proposed architecture. Reliability analysis shows that this architecture has a much higher fault tolerance than the fault-tolerant ATM networks found in the literature. In addition, the extra paths can be used to route cells when internal cell contention occurs in switching elements. Simulation results also indicate that the proposed architecture maintains a high throughput with acceptable cell delay time, even when the number of faulty components increases