• DocumentCode
    3540007
  • Title

    Cache restoration for highly partitioned virtualized systems

  • Author

    Daly, David ; Cain, Harold W.

  • Author_Institution
    IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • fYear
    2012
  • fDate
    25-29 Feb. 2012
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    The economics of server consolidation have led to the support of virtualization features in almost all server-class systems, with the related feature set being a subject of significant competition. While most systems allow for partitioning at the relatively coarse grain of a single core, some systems also support multiprogrammed virtualization, whereby a system can be more finely partitioned through time-sharing, down to a percentage of a core being allotted to a virtual machine. When multiple virtual machines share a single core however, performance can suffer due to the displacement of microarchitectural state. We introduce cache restoration, a hardware-based prefetching mechanism initiated by the underlying virtualization software when a virtual machine is being scheduled on a core, prefetching its working set and warming its initial environment. Through cycle-accurate simulation of a POWER7 system, we show that when applied to its private per-core L3 last-level cache, the warm cache translates into 20% on average performance improvement for a mixture of workloads on a highly partitioned core, compared to a virtualized server without cache restoration.
  • Keywords
    cache storage; memory architecture; multiprogramming; scheduling; virtual machines; virtualisation; POWER7 system; cache restoration; cycle-accurate simulation; hardware-based prefetching mechanism; highly partitioned virtualized systems; microarchitectural state; multiple virtual machines; multiprogrammed virtualization; per-core L3 last-level cache; performance improvement; server consolidation; server-class systems; virtualization features; virtualization software; Bandwidth; Hardware; Operating systems; Prefetching; Registers; Servers; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computer Architecture (HPCA), 2012 IEEE 18th International Symposium on
  • Conference_Location
    New Orleans, LA
  • ISSN
    1530-0897
  • Print_ISBN
    978-1-4673-0827-4
  • Electronic_ISBN
    1530-0897
  • Type

    conf

  • DOI
    10.1109/HPCA.2012.6169029
  • Filename
    6169029