Asymmetric halo CMOSFET to reduce static power dissipation with improved performance

Author

Bansal, Aditya ; Roy, Kaushik

Author_Institution

Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA

fYear

2005

fDate

23-26 May 2005

Firstpage

1

Abstract

The paper presents the benefits of asymmetric halo (AH) MOSFETs over conventional symmetric halo (SH) MOSFETs to reduce static leakage in CMOS circuits. Device doping profiles have been optimized to obtain minimum leakage at iso on-current. Static leakage in AH devices is suppressed (61% in NMOS and 90% in PMOSFET) due to reduced band-to-band tunneling current in reverse biased drain-substrate junctions. At iso on-current, the delay in an AH ring-oscillator reduces by 11% because of reduced drain junction capacitance.

Keywords

CMOS logic circuits; MOSFET; integrated circuit technology; leakage currents; logic gates; CMOS circuits; CMOS logic gate; NMOSFET; PMOSFET; asymmetric halo CMOSFET; asymmetric halo MOSFET; band-to-band tunneling current; drain junction capacitance; iso oncurrent; leakage current; reverse biased drain-substrate junctions; ring-oscillator; static leakage; static power dissipation; symmetric halo MOSFET; CMOSFETs; Circuit simulation; Doping profiles; Electrons; Implants; MOSFETs; Power dissipation; Power engineering computing; Tunneling; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1464509

Filename

1464509