High-speed real-time data acquisition system based on FPGA

Author

Xiao, Jinqiu ; Wang, Xinglong ; Feng, Yi

Author_Institution

Modern Electr. Technol. Inst., Univ. of Sci. & Technol. of Suzhou, Suzhou, China

fYear

2009

fDate

16-19 Aug. 2009

Abstract

High-speed data acquisition system is designed with the FPGA device EP2S180 as controlling unit. In order to heighten data acquisition speed, four pipelined architecture high-speed AD devices is adopt acted on the state machine and phase delay clock which is designed based on FPGA device. The conversion storage data in the coach composed of block RAM in the EP2S180 is transferred to main memory by the DDR controller. The DDR controller is also designed based on FPGA device. The frequency of the data acquisition system can reach 700 MHz, and carry on data acquisition real time.

Keywords

clocks; data acquisition; field programmable gate arrays; finite state machines; random-access storage; real-time systems; DDR controller; FPGA device EP2S180; block RAM; field programmable gate array; frequency 700 MHz; high-speed A/D conversion device; phase delay clock; pipelined architecture; real-time data acquisition system; state machine; Buffer storage; Control systems; Data acquisition; Data conversion; Digital signal processing; Field programmable gate arrays; Hardware; Pipelines; Read-write memory; Real time systems; Data conversion storage; FPGA; High-speed data acquisition;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Measurement & Instruments, 2009. ICEMI '09. 9th International Conference on

Conference_Location

Beijing

Print_ISBN

978-1-4244-3863-1

Electronic_ISBN

978-1-4244-3864-8

Type

conf

DOI

10.1109/ICEMI.2009.5274068

Filename

5274068