Title :
Gated Twin-Bit (GTB) nonvolatile memory device and its operation
Author :
Cho, Seongjae ; Park, H. Han ; Lee, Jung Hoon ; Yun, Jang-Gn ; Kim, Doo-Hyun ; Lee, Gil Sung ; Shin, Hyungcheol ; Lee, Jong Duk ; Park, Byung-Gook
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul, South Korea
Abstract :
In this study, a nonvolatile memory (NVM) device with a novel 3-dimensional structure is introduced. The device is based on a pillar structure where two memory nodes commonly reside. The storage nodes are controlled by a single control gate so that spaces between pillars can be removed and additional gates called cut-off gates help the operation. In this sense, GTB NVM device is considered as the ultimate form of 3D nonvolatile memory device based on double-gate structure. Also, the operation is validated by simulation works.
Keywords :
random-access storage; 3D nonvolatile memory device; GTB NVM device; double-gate structure; gated twin-bit nonvolatile memory device; pillar structure; storage nodes; Abstracts; Computer science; Electrons; Flash memory; Gas insulated transmission lines; Nonvolatile memory; Silicon; Switches; Tunneling; Voltage;
Conference_Titel :
Silicon Nanoelectronics Workshop, 2008. SNW 2008. IEEE
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-2071-1
DOI :
10.1109/SNW.2008.5418396
