DocumentCode
3541030
Title
Independent Double Gate - potential for non-volatile memories
Author
Bossu, G. ; Puget, S. ; Masson, P. ; Portal, J.M. ; Bouchakour, R. ; Mazoyer, P. ; Skotnicki, T.
Author_Institution
STMicroelectronics, Crolles, France
fYear
2008
fDate
15-16 June 2008
Firstpage
1
Lastpage
2
Abstract
The authors proposed an analysis of the IDG device as a potential non volatile memory cell. IDG allows the most extended electrical combinations compared to the SQeRAM and consequently a large range of use. The two gates of the transistor are dynamically and separately addressable.
Keywords
random-access storage; semiconductor device models; transistors; IDG device; electrical combinations; independent double gate; nonvolatile memories; transistor gates; CMOS integrated circuits; Capacitance; Conductive films; FinFETs; Nonvolatile memory; Poisson equations; Semiconductor films; Semiconductor process modeling; Silicon; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Silicon Nanoelectronics Workshop, 2008. SNW 2008. IEEE
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4244-2071-1
Type
conf
DOI
10.1109/SNW.2008.5418399
Filename
5418399
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