Title :
Design and simulation of folded split gate SONOS memory
Author :
Park, Se Hwan ; Park, Han, II ; Lee, Jung Hoon ; Yun, Jang-Gn ; Lee, Jong Duk ; Park, Byung-Gook
Author_Institution :
Inter-Univ. Semicond. Res. Center(ISRC), Seoul Nat. Univ., Seoul, South Korea
Abstract :
A new 2-bit/cell SONOS flash memory device is designed and simulated with a numerical simulation tool. The device has a recessed channel and a supplementary gate named a select gate. The select gate is appended to enhance the program efficiency by source-side injection (SSI) as well as to separate the charge storage nodes physically. The designed structure looks like a folded form of conventional one, so that we call the device folded Split ,Gate (FSG) memory.
Keywords :
flash memories; integrated circuit design; logic devices; flash memory device; folded split gate SONOS memory; recessed channel; source-side injection; supplementary gate; Computational modeling; Computer science; Computer simulation; Fabrication; Flash memory; Leakage current; Numerical simulation; SONOS devices; Split gate flash memory cells; Voltage;
Conference_Titel :
Silicon Nanoelectronics Workshop, 2008. SNW 2008. IEEE
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-2071-1
DOI :
10.1109/SNW.2008.5418401
