DocumentCode
3541107
Title
A compact model of fully-depleted surrounding-gate (SG) MOSFETs with a doped body
Author
Cho, NamKi ; Yu, YunSeop ; Hwang, Sungwoo
Author_Institution
Dept. of Electr. Eng., Korea Univ., Seoul, South Korea
fYear
2008
fDate
15-16 June 2008
Firstpage
1
Lastpage
2
Abstract
A compact model of fully-depleted surrounding-gate (SG) MOSFETs with a doped body is presented. Both the numerical and the analytical models are derived from approximations by a superposition principle of the depletion region and the strong inversion region for the efficiency of the calculation. From those assumptions, the numerical and the analytical center potentials are obtained, and the surface potential, the inversion charge, and the drain-source current are also obtained. The results simulated from the analytical center and surface potential models as well as those simulated from the numerical models reproduce those simulated from the 3D device simulator within 1% errors. The inversion charges and drain currents simulated from the analytical model reproduce those simulated from the numerical model within 1% errors.
Keywords
MOSFET; numerical analysis; semiconductor device models; surface potential; doped body; drain-source current; fully-depleted surrounding-gate MOSFET; inversion charge; surface potential; Analytical models; Control engineering; Equations; MOSFETs; Nanoscale devices; Numerical models; Numerical simulation; Silicon; Time domain analysis; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Silicon Nanoelectronics Workshop, 2008. SNW 2008. IEEE
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4244-2071-1
Type
conf
DOI
10.1109/SNW.2008.5418408
Filename
5418408
Link To Document