DocumentCode :
3541146
Title :
Formal Verification for SpaceWire Communication Protocol Based on Environment State Machine
Author :
Wei Hua ; Xiaojuan Li ; Yong Guan ; Zhiping Shi ; Lingling Dong ; Jie Zhang
Author_Institution :
Beijing Eng. Res. Center of High Reliable Embedded Syst., Capital Normal Univ., Beijing, China
fYear :
2012
fDate :
21-23 Sept. 2012
Firstpage :
1
Lastpage :
4
Abstract :
SpaceWire is a high-speed, full-duplex serial bus standard which is mainly used in the aerospace and other harsh environment, requiring high reliability. The traditional verification methods ,such as simulation and test, are not complete. In this paper, we present our experience on the model checking of data flow control of SpaceWire using the SMV tool. Formal verification is hard to regulate the input variables and some complex properties cannot be directly described with temporal logic, we applied environment state machine and intermediate variables to solve this problem and verify the related properties of the data flow control module, overcoming the incompleteness of the traditional methods.
Keywords :
field buses; formal verification; protocols; space communication links; telecommunication congestion control; telecommunication network reliability; SMV tool; SpaceWire communication protocol; aerospace application; data flow control module; environment state machine; formal verification; harsh environment; high-speed full-duplex serial bus standard; input variable regulation; intermediate variable; reliability; temporal logic; Aerospace electronics; Clocks; Formal verification; Model checking; Standards; Transmitters; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wireless Communications, Networking and Mobile Computing (WiCOM), 2012 8th International Conference on
Conference_Location :
Shanghai
ISSN :
2161-9646
Print_ISBN :
978-1-61284-684-2
Type :
conf
DOI :
10.1109/WiCOM.2012.6478524
Filename :
6478524
Link To Document :
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