DocumentCode :
3541153
Title :
FPGA Implementation of Frame Synchronization in Burst OFDM Communication Based on IEEE802.11a
Author :
Xiang Mei ; Zhizhong Ding ; Lili Pan
Author_Institution :
Dept. of Commun. Eng., Hefei Univ. of Technol., Hefei, China
fYear :
2012
fDate :
21-23 Sept. 2012
Firstpage :
1
Lastpage :
4
Abstract :
Synchronization is a very important issue in communication systems. In this paper, it presents the implementation of the frame synchronization in burst Orthogonal Frequency Division Multiplex (OFDM) communication based on Std IEEE 802.11a. The algorithm of frame synchronization is on the base of the classic Schmidl-Cox algorithm and detects a certain sample length. It can avoid the impact of the larger random noise, compared to the traditional packet detection algorithm. The frame synchronization is realized by the use of ten repeated short training symbols to determine the starting position of the data packet. Furthermore, the entire frame synchronization is implemented by Xilinx Field-Programmable Gate Array(FPGA) Virtex2 device.
Keywords :
OFDM modulation; field programmable gate arrays; random noise; synchronisation; wireless LAN; FPGA; IEEE802.11a; Schmidl-Cox algorithm; Xilinx field-programmable gate array Virtex2 device; burst OFDM communication system; burst orthogonal frequency division multiplex communication; data packet; frame synchronization; packet detection algorithm; random noise; repeated short training symbols; Correlation; Detection algorithms; Field programmable gate arrays; Hardware; OFDM; Synchronization; Training;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wireless Communications, Networking and Mobile Computing (WiCOM), 2012 8th International Conference on
Conference_Location :
Shanghai
ISSN :
2161-9646
Print_ISBN :
978-1-61284-684-2
Type :
conf
DOI :
10.1109/WiCOM.2012.6478525
Filename :
6478525
Link To Document :
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