DocumentCode :
3541173
Title :
Performance of dual-channel gate-all-around polysilicon nanowire thin-film transistor
Author :
Huang, Po-Chun ; Sheu, Tzu-Shiun ; Chen, Chen-Chia ; Chen, Lu-An ; Sheu, Jeng-Tzong
Author_Institution :
Inst. of Nanotechnol., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear :
2008
fDate :
15-16 June 2008
Firstpage :
1
Lastpage :
2
Abstract :
In this work, performance of dual-channel GAA poly-Si nanowire TFT with NH3 plasma passivation was demonstrated. The proposed devices exhibit low leakage current in off state, a high Ion/Iof current ratio, a low subthreshold slope, an absence of DIBL and promising output characteristics. It is believed that this high performance poly-Si TFT is suitable for future applications.
Keywords :
nanowires; silicon; thin film transistors; Ion/Iof current ratio; Ion/Iof current ratio; NH3 plasma passivation; NH3 plasma passivation; Si; dual-channel gate-all-around polysilicon nanowire thin-film transistor; Annealing; Fabrication; Grain boundaries; Grain size; Passivation; Plasma applications; Plasma density; Plasma devices; Plasma properties; Thin film transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Silicon Nanoelectronics Workshop, 2008. SNW 2008. IEEE
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-2071-1
Type :
conf
DOI :
10.1109/SNW.2008.5418415
Filename :
5418415
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3541173
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