Title :
Program/erase characteristics of twin Poly-Si Thin Film Transistors EEPROM with tri-gate nanowires structure
Author :
Yung-Chun Wu ; Su, Po-Wen ; Chang, Chin-Wei ; Hung, Min-Feng
Author_Institution :
Dept. of Eng. & Syst. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Abstract :
Program/erase characteristics of twin Poly-Si Thin Film Transistors (TFTs) EEPROM utilizing tri-gate nanowires (NWs) was demonstrated. The NWs TFT has superior gate control due to its tri-gate structure leads to higher memory window and efficiency than single-channel (SC) one. The device different gate lengths characteristics and reliability were also addressed. The capacitance ratio of proposed device of 4:1 shows optimum value in P/E operation. The present work illustrates the possibility for future system-on-panel (SOP) and 3D Flash memory application.
Keywords :
EPROM; elemental semiconductors; flash memories; nanowires; semiconductor device manufacture; semiconductor device reliability; silicon; thin film transistors; 3D flash memory; EEPROM; higher memory window; program/erase characteristics; system-on-panel; thin film transistors; tri-gate nanowires structure; Capacitance; Channel hot electron injection; EPROM; Electron devices; Flash memory; Nanowires; Nonvolatile memory; Systems engineering and theory; Thin film transistors; Tunneling;
Conference_Titel :
Silicon Nanoelectronics Workshop, 2008. SNW 2008. IEEE
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-2071-1
DOI :
10.1109/SNW.2008.5418421
