A novel methodology for the design of LC tank VCO with low phase noise

Author

Jia, Lin ; Ma, Jian-Guo ; Yeo, Kiat Seng ; Do, Manh Anh

Author_Institution

Center for Integrated Circuit & Syst., Nanyang Technol. Univ., Singapore, Singapore

fYear

2005

fDate

23-26 May 2005

Firstpage

376

Abstract

A novel methodology for reducing the phase noise of a cross-coupled LC tank VCO is presented, verified and measured. The fundamental relationship between the phase noise and the channel length of the cross-coupled MOS transistors is derived, and an optimum channel length of MOS transistors is indicated for a cross-coupled LC tank VCO with the lowest phase noise. A 2 GHz LC tank VCO is designed by this methodology and fabricated by 0.18 μm CMOS technology. The phase noise is -103.3 dBc/Hz at 100 kHz offset frequency and -118.9 dBc/Hz at 600 kHz offset with low-power consumption around 3.15 mW. The best FOM value of 186 is achieved compared to the reported 2 GHz VCO. The tuning range is 14% at a center frequency of 2.05 GHz.

Keywords

CMOS analogue integrated circuits; UHF oscillators; circuit tuning; integrated circuit design; low-power electronics; phase noise; power consumption; voltage-controlled oscillators; 0.18 micron; 2.05 GHz; 3.15 mW; CMOS technology; cross-coupled LC tank VCO; cross-coupled MOS transistor channel length; figure of merit; offset frequency; phase noise; power consumption; Design methodology; Energy consumption; Frequency; MOS devices; MOSFETs; Parasitic capacitance; Phase noise; Resistors; Tuning; Voltage-controlled oscillators; Figure of Merit; Frequency Tuning Range; LC Tank VCO; Optimum Channel Length of MOS transistor; Reducing Phase Noise Methodology; Relationship of Minimal Phase noise and Optimum Channel Length; power consumption;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1464603

Filename

1464603