• DocumentCode
    3541439
  • Title

    Search space reduction through clustering in test generation

  • Author

    Sahraoui, Zohair ; Six, Paul ; Bolsens, Ivo ; De Man, Hugo

  • Author_Institution
    IMEC, Leuven, Belgium
  • fYear
    1995
  • fDate
    18-22 Sep 1995
  • Firstpage
    242
  • Lastpage
    247
  • Abstract
    An important factor of performance in test generation is the number of decisions in the search space. The more decisions are made in order to find a test the larger is the search space. This paper introduces an algorithm for the reduction of the number of decisions. Unlike classical test generation methods which perform their search on a netlist of gates, this algorithm works at a higher level. The gates of the circuit to test are partitioned into clusters. The search performed at the cluster level becomes a progressive translation of a set of value assignments to another set of value assignments that steps over cluster boundaries. To be able to step over cluster boundaries sensitization and propagation conditions are used. Experimental data demonstrate the effectiveness of the algorithm in reducing the number of decisions
  • Keywords
    automatic testing; logic CAD; logic design; logic testing; cluster boundaries; clustering; progressive translation; search space reduction; test generation; value assignments; Circuit faults; Circuit testing; Clustering algorithms; Decision making; Logic; Performance evaluation; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1995, with EURO-VHDL, Proceedings EURO-DAC '95., European
  • Conference_Location
    Brighton
  • Print_ISBN
    0-8186-7156-4
  • Type

    conf

  • DOI
    10.1109/EURDAC.1995.527413
  • Filename
    527413