Title : 
A new formulation of fast diminished-one multioperand modulo 2n+1 adder
         
        
            Author : 
Cao, Bin ; Chang, Chip-Hong ; Srikanthan, Thambipillai
         
        
            Author_Institution : 
Centre for High Performance Embedded Syst., Nanyang Technol. Univ., Singapore, Singapore
         
        
        
        
        
            Abstract : 
We introduce a new concept of composite carry-save adders with complementary end-around carry (CCSA with CEAC) to model the multioperand modulo 2n+1 adder. The CCSA with CEAC is a combination of CSA with EAC and a constant residue counter, where the latter is used to account for the intrinsic residues generated by the diminished-one modulo 2n+1 additions at various levels of the multioperand modulo adder (MOMA). With the proposed reduction rules, we prove that the companion residue counter tree can be eliminated. The resultant architecture is a universal structure for the diminished-one multioperand modulo 2n+1 adder, consisting of only a CSA with CEAC tree and a 2-input diminished-one adder. The latter can be implemented by any of the efficient solutions reported in the literature, which make the proposed structure operates as fast as the high-speed modulo 2n-1 MOMA.
         
        
            Keywords : 
adders; carry logic; complementary end-around carry; composite carry-save adders; diminished-one adder; diminished-one multioperand modulo adder; Arithmetic; Counting circuits; Cryptography; Design methodology; Embedded system; Fault tolerant systems; Hardware; Pipeline processing;
         
        
        
        
            Conference_Titel : 
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
         
        
            Print_ISBN : 
0-7803-8834-8
         
        
        
            DOI : 
10.1109/ISCAS.2005.1464673