DocumentCode
3541825
Title
A high-performance CMOS charge pump for PLLs
Author
Pan, Jianbin ; Zhao, Yuanfu ; Liang, Xin
Author_Institution
Technol. Inst., Beijing Microelectron., Beijing, China
fYear
2009
fDate
19-22 Dec. 2009
Firstpage
98
Lastpage
101
Abstract
In conventional CMOS charge pump circuits, there are some non-ideal effects such as the clock feedthrough, current mismatch and charge sharing which result in a phase offset in phase-locked loop circuits. This paper presents a new charge pump to reduce the jitter. The proposed and conventional charge pumps are simulated and compared. The circuit is implemented using a 0.35¿m mix-signal CMOS process. And the simulation result is obtained by SPECTRES.
Keywords
CMOS integrated circuits; charge pump circuits; integrated circuit modelling; mixed analogue-digital integrated circuits; phase locked loops; PLL; SPECTRES; high-performance CMOS charge pump; jitter reduction; mix-signal CMOS process; non-ideal effects; Charge pumps; Meteorology; Oceans; Remotely operated vehicles; Sampling methods; Sea measurements; Sea surface; Storms; Temperature sensors; Tropical cyclones; Charge pump; Phase-Locked Loops;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics (ICM), 2009 International Conference on
Conference_Location
Marrakech
Print_ISBN
978-1-4244-5814-1
Type
conf
DOI
10.1109/ICM.2009.5418578
Filename
5418578
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