• DocumentCode
    3541870
  • Title

    A heuristic approach for multiple restricted multiplication

  • Author

    Sidahao, Nalin ; Constantinides, George A. ; Cheung, Peter Y K

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Imperial Coll., London, UK
  • fYear
    2005
  • fDate
    23-26 May 2005
  • Firstpage
    692
  • Abstract
    This paper introduces a heuristic solution to the multiple restricted multiplication (MRM) optimization problem. MRM refers to a situation where a single variable is multiplied by several coefficients which, while not constant, are drawn from a relatively small set of values. The algorithm involves deriving directed acyclic graphs representing multiple constant multiplication obtained for each time step and then merging these graphs into a single MRM graph. For FPGA implementation, the proposed approach results in significant area savings, especially for large problem sizes, and is time-efficient compared to a previous optimum approach using integer linear programming.
  • Keywords
    circuit optimisation; digital arithmetic; directed graphs; field programmable gate arrays; multiplying circuits; FPGA implementation; directed acyclic graphs; heuristic approach; multiple restricted multiplication; optimization problem; Costs; Digital signal processing; Educational institutions; Field programmable gate arrays; Hardware; Integer linear programming; Logic programming; Merging; Read only memory; Signal processing algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
  • Print_ISBN
    0-7803-8834-8
  • Type

    conf

  • DOI
    10.1109/ISCAS.2005.1464682
  • Filename
    1464682