The design of the novel BiCMOS ESD protection circuit with low trigger voltage and fast turn-on speed

Author

Koo, Yong-Seo ; Lee, Hyun-Duck ; Ha, Jae-Hwan ; Kwak, Jae-chang ; Kwon, Jong-Kee

Author_Institution

Dept. of Electron. & Electr. Eng., DanKook Univ., Yongin, South Korea

fYear

2009

fDate

19-22 Dec. 2009

Firstpage

366

Lastpage

369

Abstract

In this paper, the design of the novel BiCMOS ESD protection circuit with low trigger voltage and fast turn-on speed is proposed. The proposed ESD protection circuit is verified by the transmission line pulse system. The results show that the novel BiCMOS ESD protection circuit has lower trigger voltage of 5.98 V compared with that of conventional GGNMOS. And this ESD protection circuit has faster turn-on time of about 37ns than that of the conventional substrate-triggered ESD protection circuit. Also, the ESD protection circuit pass the ESD of HBM 3.2kV and MM 210 V.

Keywords

BiCMOS integrated circuits; electrostatic discharge; integrated circuit design; BiCMOS ESD protection circuit; electrostatic discharge; gate grounded NMOS; transmission line pulse system; trigger voltage; turn-on speed; voltage 210 V; voltage 3.2 kV; voltage 5.98 V; BiCMOS integrated circuits; Electrostatic discharge; Low voltage; Microelectronics; Protection; ESD; Turn on speed; gate grounded NMOS (GGNMOS); low trigger voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics (ICM), 2009 International Conference on

Conference_Location

Marrakech

Print_ISBN

978-1-4244-5814-1

Type

conf

DOI

10.1109/ICM.2009.5418608

Filename

5418608