An 8Hz, 0.1µW, 110+ dBs Sinh CMOS Bessel filter for ECG signals

Hyperbolic sine (Sinh) CMOS filters are of inherent class-AB nature and offer high dynamic range at half the total capacitance value when compared against their pseudodifferential class-AB log-domain counterparts. This characteristic renders their theoretical and practical study valuable. Only a very limited number of CMOS Sinh filter topologies have been reported in the literature to date mostly due to the considerably increased mathematical complexity associated with their design. This paper presents the transistor-level synthesis and investigates in detail the performance of a 3rd-order Sinh CMOS 8Hz low-pass filter of Bessel approximation suitable for ECG processing. The filter is based on recent progress made and has been designed in the commercially available 0.35 μm AMS process. Its static power consumption amounts to 0.1 μW while its dynamic range exceeds 110 dBs. The new filter exhibits a flat group delay of less than 1% error up to 6 Hz and good variability performance verified by means of Monte Carlo simulations. The suitability of the filter as part of an ECG front-end is confirmed by the processing of artificially generated ECG signals contaminated by various simulated noise sources and fed as signal inputs into the Cadence Design Framework.