Title :
Implementation of the AVS video decoder on a heterogeneous dual-core SIMD processor
Author :
Koziri, Maria ; Bellas, Nikos ; Katsavounidis, Ioannis ; Zacharis, Dimitrois
Author_Institution :
Dept. of Comput. & Commun. Eng., Univ. of Thessaly, Volos, Greece
Abstract :
This paper presents the implementation of Advanced Audio and Video Standard Part 2: Video (AVS P2), the Chinese video standard, to Diamond 388VDO Video Processor, a heterogeneous dual core Tensilica SIMD processor. Through the process of mapping AVS video decoder to 388VDO we aim to explore and exploit the different forms of parallelism inherent in a video application in order to speedup AVS decoding and achieve real time functionality.
Keywords :
decoding; parallel processing; video coding; AVS decoding; AVS video decoder; audio standard; heterogeneous dual-core SIMD processor; video standard; Clocks; Communication standards; Decoding; Delay; Engines; High definition video; Parallel processing; Random access memory; Read-write memory; Streaming media;
Conference_Titel :
Consumer Electronics (ICCE), 2010 Digest of Technical Papers International Conference on
Conference_Location :
Las Vegas, NV
Print_ISBN :
978-1-4244-4314-7
Electronic_ISBN :
978-1-4244-4316-1
DOI :
10.1109/ICCE.2010.5418696
