DocumentCode :
3542739
Title :
A novel substrate-triggered ESD protection structure for a bus switch IC with on-chip substrate-pump
Author :
Tong, Paul C F ; Xu, Ping-Ping ; Chen, Wensong ; Hui, John ; Liu, Patty Z Q
Author_Institution :
Technol. Dept., Pericom Semicond., San Jose, CA, USA
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
1190
Abstract :
Experimental results show ESD level will become worse if more I/O pins are connected to the ground during I/O to I/O ESD zapping for the substrate pumped bus switch IC. As a result, it will fail +1KV during I/O to all other I/O HBM ESD zapping configurations. A new substrate-triggered ESD protection structure is proposed to increase the ESD robustness of this special bus switch product. The test results show the IC with this new ESD protection structure can pass the +3kV HBM ESD test.
Keywords :
CMOS integrated circuits; electrostatic discharge; integrated circuit reliability; integrated circuit testing; substrates; HBM ESD zapping; I/O to I/O ESD zapping; IC test; bus switch IC; on-chip substrate-pump; substrate-triggered ESD protection; Circuits; Clamps; Electrostatic discharge; MOS devices; Pins; Power supplies; Protection; Robustness; Switches; Variable structure systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1464806
Filename :
1464806
Link To Document :
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