DocumentCode :
3543092
Title :
Timing-driven Steiner tree construction based on feasible assignment of hidden Steiner points
Author :
Yan, Jin-Tai ; Wang, Tzu-Ya ; Lee, Yu-Cheng
Author_Institution :
Dept. of Comput. Sci. & Inf., Chung-Hua Univ., Hsinchu, Taiwan
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
1370
Abstract :
In this paper, given a set of connecting nodes in a signal net, based on the concept of movable Steiner points and the dining-driven flexibility of a Steiner point, it is assumed that all the Steiner points are initially hidden inside the connecting nodes in a shortest-path tree (SPT). An effective timing-driven rectilinear Steiner tree (TRST) approach is proposed to obtain a timing-driven rectilinear Steiner tree by introducing hidden Steiner points in a SPT onto feasible positions. The experimental results show that our proposed TRST approach obtains better timing-driven Steiner trees than the MVERT approach for the tested signal nets.
Keywords :
network routing; network topology; trees (mathematics); connecting nodes; dining-driven flexibility; feasible assignment; hidden Steiner points; movable Steiner points; rectilinear Steiner tree; shortest-path tree; signal nets; timing-driven Steiner tree construction; Capacitance; Circuits; Computer science; Delay; Joining processes; Routing; Signal design; Steiner trees; Timing; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1464851
Filename :
1464851
Link To Document :
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