Title :
FAMe: A novel OTP NV memory cell based on a fuse-antifuse series arrangement
Author :
Monreal, Gerardo
Author_Institution :
Allegro Argentina Design Center, Buenos Aires, Argentina
fDate :
Oct. 31 2012-Nov. 2 2012
Abstract :
Non-Volatile One-Time-Programmable (NV-OTP) cells are typically based on either an anti-fuse (AF) or a fuse (F) structure but rarely on a combination of both types interacting as a single circuit during programming and detection. This work introduces such a cell named FAMe for Fuse Antifuse Memory. FAMe bit cell is in essence an “OTP-inverter”, where a metal fuse and a 3-terminal Gate-Grounded isolated-NMOS antifuse are connected in series across a Power rail. High detection margins and area efficiency, lower power consumption and CMOS scalability makes it attractive for applications requiring up to 500 bit per die.
Keywords :
CMOS memory circuits; electric fuses; invertors; random-access storage; 3-terminal gate-grounded isolated-NMOS antifuse; AF structure; CMOS scalability; FAMe bit cell; OTP NV memory cell; OTP-inverter; antifuse structure; fuse structure; fuse-antifuse series arrangement; high detection margins; nonvolatile one-time-programmable cells; power consumption; power rail; Arrays; Fuses; Metals; Programming; Radio frequency; Rails; Switches; Antifuse; Fuse; OTP;
Conference_Titel :
Non-Volatile Memory Technology Symposium (NVMTS), 2012 12th Annual
Conference_Location :
Singapore
Print_ISBN :
978-1-4673-2847-0
DOI :
10.1109/NVMTS.2013.6632855