DocumentCode
3543318
Title
A new erase saturation issue in cylindrical junction-less charge-trap memory arrays
Author
Maconi, A. ; Compagnoni, C. Monzio ; Spinelli, Alessandro S. ; Lacaita, Andrea L.
Author_Institution
Dipt. di Elettron. e Inf., Politec. di Milano, Milan, Italy
fYear
2012
fDate
10-13 Dec. 2012
Abstract
We present a new erase saturation issue compromising the performance of cylindrical charge-trap cells integrated along junction-less NAND strings. The phenomenon comes from the inability to properly induce an inversion layer in the inter-cell regions of the string during read in the cylindrical geometry, pinning the threshold voltage (VT) resulting from cell erase. The dependence of this issue on string parameters is investigated, showing that a reduction in the inter-cell regions may relieve it. However, this originates a trade-off against the constraints raised by the lateral diffusion of electrons in the charge-trap layer during data retention. It is shown that this trade-off can be easily managed by strings with large substrate radius, while its solution is more critical for small radii.
Keywords
NAND circuits; digital storage; geometry; NAND strings; charge-trap cells; cylindrical geometry; cylindrical junction-less charge-trap memory arrays; data retention; erase saturation issue; intercell regions; inversion layer; lateral diffusion; substrate radius; threshold voltage; Abstracts; Electron traps; Geometry; Logic gates; Numerical simulation; Substrates; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting (IEDM), 2012 IEEE International
Conference_Location
San Francisco, CA
ISSN
0163-1918
Print_ISBN
978-1-4673-4872-0
Electronic_ISBN
0163-1918
Type
conf
DOI
10.1109/IEDM.2012.6478965
Filename
6478965
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