Title :
A switched delay line based optical switch architecture with a bypass line
Author :
Wu, Ho-Ting ; Ke, Kai-Wei ; Chang, Wang-Rong ; Lin, Hui-Tang
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Nat. Taipei Univ. of Technol., Taiwan
Abstract :
This paper proposes a new switching architecture to be used in all-optical networks. The proposed switch, M-B-Quadro switch, is extended from an original 2×2 two-stage multi-buffer switched delay line based optical switching node, known as M-Quadro node. By incorporating bypass lines and employing a novel switch control strategy, denoted as LAVS, the switching node can effectively resolve packet contentions, thus reducing the packet deflection probability substantially.
Keywords :
optical delay lines; optical fibre networks; optical switches; packet switching; probability; LAVS; M-B-Quadro switch; all-optical networks; bypass line; multi-buffer switched delay line; optical switch architecture; packet contentions; packet deflection probability; switch control; switching architecture; All-optical networks; Buffer storage; Computer architecture; Computer science; Delay lines; Fabrics; Optical buffering; Optical packet switching; Optical switches; Packet switching; Bypass Line; Optical Switch; Switched Delay Line;
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
DOI :
10.1109/ISCAS.2005.1464892
