DocumentCode :
3543525
Title :
A new generation of surface potential-based poly-Si TFTs compact model
Author :
Ikeda, Hinata ; Sano, Natsuki
Author_Institution :
Inst. of Appl. Phys., Univ. of Tsukuba, Tsukuba, Japan
fYear :
2012
fDate :
10-13 Dec. 2012
Abstract :
This paper proposes a new generation of surface potential-based poly-Si TFTs (SPT) compact model for SPICE. This model has succeeded to simulate transient phenomenon caused by capture and emission of carriers at poly-Si grain boundaries (GBs), which has been verified by the precise reproduction of frequency dependent time delay in a 21-stage inverter chain. Besides, this model has allowed us to simulate photo-induced drain current by non-equilibrium approach and pinch-off voltage lowering (PVL) phenomenon peculiar to poly-Si TFTs.
Keywords :
elemental semiconductors; grain boundaries; semiconductor device models; silicon; surface potential; thin film transistors; transient analysis; 21-stage inverter chain; GB; PVL phenomenon; SPICE model; Si; carrier emission; frequency dependent time delay reproduction; nonequilibrium approach; photoinduced drain current simulation; pinch-off voltage lowering phenomenon; polysilicon grain boundaries; surface potential-based polysilicon TFT compact model; transient phenomenon simulation; Electric potential; Integrated circuit modeling; Lighting; Mathematical model; Switches; Thin film transistors; Transient analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2012 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0163-1918
Print_ISBN :
978-1-4673-4872-0
Electronic_ISBN :
0163-1918
Type :
conf
DOI :
10.1109/IEDM.2012.6478993
Filename :
6478993
Link To Document :
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