DocumentCode :
3543636
Title :
Domino logic with an efficient variable threshold voltage keeper
Author :
Amirabadi, A. ; Mortazavi, Y. ; Moezzi-Madani, N. ; Afzali-Kusha, A. ; Nourani, M.
Author_Institution :
ECE Dept., Tehran Univ., Iran
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
1674
Abstract :
In this work, domino logic with a variable threshold voltage keeper which uses an efficient body bias is proposed. The generator which consists of a capacitor and a diode is based on the voltage doubler technique. In the proposed scheme, the keeper size may be increased to improve the noise-immunity of the domino logic without significantly increasing the power and the delay. In addition, the proposed generator circuit is simple, consumes a smaller area, and operates with a single supply voltage. The results of simulation for a 0.18 μm CMOS technology show an improvement of 18% and 59% in power and delay, respectively, for this technique compared to the standard domino logic.
Keywords :
CMOS logic circuits; circuit simulation; integrated circuit design; integrated circuit modelling; logic design; logic simulation; low-power electronics; threshold elements; 0.18 micron; CMOS technology; domino logic; efficient body bias; generator capacitor; generator circuit area; generator diode; keeper size; logic delay; logic power; noise-immunity; simulation; supply voltage; variable threshold voltage keeper; voltage doubler technique; CMOS logic circuits; CMOS technology; Circuit noise; Circuit simulation; Degradation; Delay; Energy efficiency; Logic circuits; Noise reduction; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1464927
Filename :
1464927
Link To Document :
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