High throughput four-parallel RS decoder architecture for 60GHz mmWAVE WPAN systems

This paper presents a high-throughput lowcomplexity four-parallel Reed-Solomon (RS) decoder for mmWAVE WPAN systems. Four-parallel processing is used to achieve 6-Gbps data throughput and low hardware complexity. The proposed four-parallel RS decoder has been implemented 90 nm CMOS technology optimized for a 1.2 V supply voltage. The implementation result shows that the proposed RS decoder can operates at a clock frequency of 400 MHz and has a data throughput 12.8-Gbps. The proposed four-parallel RS decoder architecture has high data processing rate and low hardware complexity, and also can be adapted in the FEC devices for mmWave WPAN systems with a data rate of 6-Gbps and beyond.