DocumentCode :
3543804
Title :
Network-on-chip-centric approach to interleaving in high throughput channel decoders
Author :
Neeb, Christian ; Thul, Michael J. ; Wehn, Norbert
Author_Institution :
Kaiserslautern Univ., Germany
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
1766
Abstract :
Reliable wireless communication needs efficient channel coding schemes like turbo and LDPC codes. During decoding, data is exchanged iteratively between component decoders. Between iterations, however, the data blocks are subjected to a permutation (or interleaving). As parallelization of the decoder architectures is mandatory for high throughput, access conflicts can occur. For standard compliant decoders it is impossible to design, or pre-process, the permutation patterns such that conflicts are avoided. Therefore, we employ networks-on-chip capable of resolving access conflicts at run-time to support arbitrary interleavers without any pre-processing.
Keywords :
channel coding; integrated circuit design; iterative decoding; network routing; parallel architectures; parity check codes; turbo codes; channel coding; high throughput channel decoders; interleaving; iterative decoding; network routing; network-on-chip; parallel architecture; parallel decoder architecture; turbo codes; wireless communication; Electronic mail; Intelligent networks; Interleaved codes; Iterative decoding; Runtime; Shape; Spatial resolution; Telecommunication network reliability; Throughput; Turbo codes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1464950
Filename :
1464950
Link To Document :
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