Cooling three-dimensional integrated circuits using power delivery networks

Author

Hai Wei ; Wu, T.F. ; Sekar, D. ; Cronquist, B. ; Pease, R. Fabian ; Mitra, Subhasish

Author_Institution

Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA

fYear

2012

fDate

10-13 Dec. 2012

Abstract

Our comprehensive analysis, over a range of 3D integration methods and application power density characteristics, quantifies major benefits of PDNs on the temperature distribution of 3D ICs. For example, PDNs can reduce the maximum steady-state temperature by over 35 °C for a 2-layer monolithic 3D IC. Our OpenSPARC T2 case study also demonstrates that the cooling benefits of PDNs are essential to achieve monolithic 3D integration. Our analysis framework can be adopted for exploring technology-circuit-application interactions for a wide variety of 3D technologies, cooling options, PDN designs, or even software-level task scheduling approaches. Of course, it is essential to experimentally validate the simulation results presented in this paper.

Keywords

cooling; integrated circuit packaging; temperature distribution; three-dimensional integrated circuits; 2-layer monolithic 3D IC; OpenSPARC T2 case study; PDN; PDN designs; monolithic 3D integration method; power delivery networks; power density characteristics; software-level task scheduling approach; technology-circuit-application interactions; temperature distribution; three-dimensional integrated circuit cooling; Density measurement; Heating; Integrated circuit modeling; Power system measurements; Silicon; Temperature distribution;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting (IEDM), 2012 IEEE International

Conference_Location

San Francisco, CA

ISSN

0163-1918

Print_ISBN

978-1-4673-4872-0

Electronic_ISBN

0163-1918

Type

conf

DOI

10.1109/IEDM.2012.6479040

Filename

6479040