Physical mechanism determining Ge p- and n-MOSFETs mobility in high Ns region and mobility improvement by atomically flat GeOx/Ge interfaces

Hall measurements have been carried out for the Ge p-and n-MOSFETs with different substrate orientations and GeO_x/Ge interface qualities. It is found that the significant reduction of effective mobility in high surface carrier concentration (N_s) or high normal field in Ge MOSFETs is attributed partly to the N_s loss due to large amounts of interface states inside the valence and conduction bands of Ge. The GeO_x/Ge interface roughness is another reason limiting the high N_s mobility. It has been revealed that room temperature plasma post oxidation can realize Al₂O₃/GeO_x/Ge gate stacks with atomically-flat GeO_x/Ge interfaces. Ge MOSFETs with these interfaces have provided record high effective hole and electron mobility, which overcome the Si universal mobility in both low and high N_s regions.