DocumentCode :
3544094
Title :
High performance extremely thin SOI (ETSOI) hybrid CMOS with Si channel NFET and strained SiGe channel PFET
Author :
Cheng, K. ; Khakifirooz, A. ; Loubet, N. ; Luning, S. ; Nagumo, Toshiharu ; Vinet, M. ; Liu, Quanwei ; Reznicek, Alexander ; Adam, Tijjani ; Naczas, S. ; Hashemi, Pouya ; Kuss, James ; Li, Jie ; He, Haibo ; Edge, L. ; Gimbert, J. ; Khare, Priyank ; Zhu, Y
Author_Institution :
IBM, Albany, NY, USA
fYear :
2012
fDate :
10-13 Dec. 2012
Abstract :
For the first time, we report high performance hybrid channel ETSOI CMOS by integrating strained SiGe-channel (cSiGe) PFET with Si-channel NFET at 22nm groundrules. We demonstrate a record high speed ring oscillator (fan-out = 3) with delay of 8.5 ps/stage and 11.2 ps/stage at VDD = 0.9V and VDD = 0.7V, respectively, outperforming state-of-the-art finFET results. A novel “STI-last” integration scheme is developed to improve cSiGe uniformity and enable ultra high performance PFET with narrow widths. Furthermore, cSiGe modulates device Vt, thus providing an additional knob to enable multi-Vt while maintaining undoped channels for all devices.
Keywords :
CMOS integrated circuits; Ge-Si alloys; MOSFET; elemental semiconductors; oscillators; silicon; silicon-on-insulator; STI-last integration scheme; Si; SiGe; channel NFET; finFET; high performance extremely thin SOI; high speed ring oscillator; hybrid channel ETSOI CMOS; modulation device; size 22 nm; strained channel PFET; voltage 0.7 V; voltage 0.9 V; CMOS integrated circuits; Epitaxial growth; Logic gates; Performance evaluation; Silicon; Silicon germanium; Stress;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2012 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0163-1918
Print_ISBN :
978-1-4673-4872-0
Electronic_ISBN :
0163-1918
Type :
conf
DOI :
10.1109/IEDM.2012.6479063
Filename :
6479063
Link To Document :
بازگشت