Title :
Highly compact 1T-1R architecture (4F2 footprint) involving fully CMOS compatible vertical GAA nano-pillar transistors and oxide-based RRAM cells exhibiting excellent NVM properties and ultra-low power operation
Author :
Wang, X.P. ; Fang, Zhou ; Li, Xin ; Chen, Bing ; Gao, Bingzhao ; Kang, J.F. ; Chen, Z.X. ; Kamath, Anant ; Shen, N.S. ; Singh, Navab ; Lo, G.Q. ; Kwong, D.L.
Author_Institution :
Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore
Abstract :
For the first time, nano-meter-scaled 1T-1R non-volatile memory (NVM) architecture comprising of RRAM cells built on vertical GAA nano-pillar transistors, either junction-less or junction-based, is systematically investigated. Transistors are fabricated using fully CMOS compatible technology and RRAM cells are stacked onto the tip of the nano-pillars (with a diameter down to ~37nm) to achieve a compact 4F2 footprint. In addition, through this platform, different RRAM stacks comprising CMOS friendly materials are studied, and it is found that TiN/Ni/HfO2/n+-Si RRAM cells show excellent switching properties in either bipolar or unipolar mode, including (1) ultra-low switching current/power: SET ~20nA/85nW and RESET ~200pA/700pW, (2) multi-level switchability, (3) good endurance, >105, (4) satisfactory retention, 10 years at 85oC; and (5) fast switching speed ~50ns. Moreover, this vertical (gate-all-around) GAA nano-pillar based 1T-1R architecture provides a more direct and flexible test vehicle to verify the scalability and functionality of RRAM candidates with a dimension close to actual application.
Keywords :
CMOS integrated circuits; random-access storage; transistor circuits; 1T-1R architecture; CMOS compatible technology; CMOS compatible vertical GAA nanopillar transistors; CMOS friendly materials; NVM properties; RRAM stacks; bipolar mode; multilevel switchability; nonvolatile memory; oxide based RRAM cells; ultralow power operation; ultralow switching current; unipolar mode; Computer architecture; Hafnium compounds; Nickel; Resistance; Silicon; Tin; Transistors;
Conference_Titel :
Electron Devices Meeting (IEDM), 2012 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4673-4872-0
Electronic_ISBN :
0163-1918
DOI :
10.1109/IEDM.2012.6479082