DocumentCode :
3544408
Title :
Design and implementation of RLS identification algorithm based on FPGA
Author :
Li, Jia ; Wei, Xuezhe ; Dai, Haifeng
Author_Institution :
Sch. of automotive Eng., Tongji Univ., Shanghai, China
fYear :
2009
fDate :
16-19 Aug. 2009
Abstract :
The RLS identification algorithm has been widely used in many fields. FPGA implements RLS algorithm parallel and pipeline. In this paper, we build the RLS algorithm model using DSP Builder based on the circuit model of fuel cell stack, and then use collected voltage and current data to simulate. Results prove the correctness of the design, and that it is simpler and faster by using DSP Builder to implement RLS algorithm.
Keywords :
digital signal processing chips; electrical resistivity; field programmable gate arrays; fuel cells; least squares approximations; parallel processing; pipeline processing; recursive estimation; DSP Builder; FPGA; RLS algorithm model; RLS identification algorithm; circuit model; design process; digital signal processing; field programmable gate array; fuel cell stack; internal resistance estimation; parallel processing; pipeline processing; recursive least squares identification algorithm; Algorithm design and analysis; Circuits; Digital signal processing; Field programmable gate arrays; Fuel cells; Hardware design languages; Parameter estimation; Resonance light scattering; Signal processing algorithms; Voltage; DSP Builder; FPGA; RLS;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Measurement & Instruments, 2009. ICEMI '09. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-3863-1
Electronic_ISBN :
978-1-4244-3864-8
Type :
conf
DOI :
10.1109/ICEMI.2009.5274504
Filename :
5274504
Link To Document :
بازگشت