Chip-level three-dimensional stacking for free-space optical interconnects

Summary form only given. One way of reducing the size of the electronic hardware is through three-dimensional (3-D) packaging at the chip level. This approach reduces the length of the chip-to-chip interconnects by placing the neighboring chips in very close proximity to each other. Each chip in the stack communicates with its neighbors via electrical interconnects. Free-space optics provide the much-needed low-power global high-density interconnects to communicate between stacks. We show a schematic view of multiple 3-D electronic chip stacks interconnected via free-space optoelectronics. An array of microlasers and detectors are attached to each stack. The stacks communicate between each other via micro-optical components. 3-D packaging allows the overall system size to be small.