Simulation of the effect of arsenic discrete distribution on device characteristics in silicon nanowire transistors

We have theoretically investigated the effects of random discrete dopant (RDD) distribution on the device characteristics in silicon nanowire (NW) transistors by performing non-equilibrium Green´s function simulation combined with kinetic Monte Carlo method for generating RDD distribution. We show that a small number of dopant atoms diffusing into the channel have a significant impact on the threshold voltage (V_th) variation. We examine the dependence of the V_th variation on RDD distribution and find that the fluctuation can be significantly reduced by introducing side-wall gate spacers. We also find that the on-current fluctuation is mainly caused by randomness of As dopants in the source and drain extensions and hence is inherent in ultra-small NW transistors.