DocumentCode
3544763
Title
Systematic CMOS transistor mismatch characterization
Author
Serrano-Gotarredona, Teresa ; Linares-Barranco, Bernabé
Author_Institution
Dept. of Analog Design, Nat. Microelectron. Centre, Sevilla, Spain
Volume
4
fYear
1996
fDate
12-15 May 1996
Firstpage
113
Abstract
This paper presents a simple and cheap procedure for characterizing CMOS transistor mismatch. No automatic positioning probe machines are necessary. The technique requires only the use of a host computer, a DC curve tracer (like the HP4145) and a special purpose chip. Characterizations results are given for two processes: the ES2 1.0 μm CMOS process and the CNM 2.5 μm CMOS process
Keywords
CMOS integrated circuits; integrated circuit measurement; 1.0 micron; 2.5 micron; CMOS transistor mismatch; CNM process; DC curve tracer; ES2 process; HP4145; host computer; special purpose chip; systematic characterization; CMOS process; Circuits; Instruments; MOSFETs; Microelectronics; Noise measurement; Position measurement; Probes; Semiconductor device measurement; Size measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location
Atlanta, GA
Print_ISBN
0-7803-3073-0
Type
conf
DOI
10.1109/ISCAS.1996.541913
Filename
541913
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