DocumentCode
3544976
Title
Partial encryption of compressed images employing FPGA
Author
Reaz, M.B.I. ; Mohd-Yasin, F. ; Tan, S.L. ; Tan, H.Y. ; Ibrahimy, M.I.
Author_Institution
Fac. of Eng., Multimedia Univ., Selangor, Malaysia
fYear
2005
fDate
23-26 May 2005
Firstpage
2385
Abstract
We present the realization of partial encryption of compressed images on an Altera FLEX10K FPGA device that allows for efficient hardware implementation. The compression algorithm decomposes images into several different parts. A secure encryption algorithm is then used to encrypt only the crucial parts, which are considerably smaller than the original image. This results in significant reduction in processing time and computational requirement for encryption and decryption. The breadth-first traversal linear lossless quadtree decomposition method is used for the partial compression and RSA is used for the encryption. Functional simulations are carried out to verify the functionality of the individual modules and the system on four different images. The comparisons, verification and analysis made validate the advantage of this approach. The design has utilized 2928 units of LC and a system frequency of 13.42 MHz.
Keywords
cryptography; data compression; field programmable gate arrays; high level synthesis; image coding; integrated circuit design; quadtrees; 13.42 MHz; FPGA; RSA encryption; VHDL code synthesis; breadth-first traversal linear lossless quadtree decomposition method; compressed image partial encryption; decryption; image decomposition; Communication system security; Compression algorithms; Computational modeling; Cryptography; Discrete wavelet transforms; Field programmable gate arrays; Frequency; Hardware; Image coding; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN
0-7803-8834-8
Type
conf
DOI
10.1109/ISCAS.2005.1465105
Filename
1465105
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