Title :
A 2.7-mW 145dB-SQNR sigma delta modulator
Author :
Sohel, Mohammed Arifuddin ; Reddy, K. Chenna keshava ; Sattar, Syed Abdul
Author_Institution :
Muffakham Jah Coll. of Eng., Hyderabad, India
Abstract :
A high resolution low power sigma delta modulator for analog to digital conversion (ADC) over 20 KHz range is presented. The modulator consists of a fourth order design operating at a baseband frequency of 20 KHz with an oversampling ratio (OSR) of 256. A continuous time active RC loop filter based design is implemented, which achieves a Signal to Quantization Noise Ratio (SQNR) of 145dB leading to a 24 bit resolution of the ADC. A very low power consumption of 2.7 mW at a supply voltage of 1.8V is achieved in 0.18micron CMOS technology. A CIFB topology is chosen to implement the modulator which supports stable operation at large resolution.
Keywords :
CMOS integrated circuits; RC circuits; continuous time filters; network topology; sigma-delta modulation; 0.18micron CMOS technology; CIFB topology; SQNR sigma delta modulator; analog-to-digital conversion; baseband frequency; continuous time active RC loop filter based design; frequency 20 kHz; high resolution low power sigma delta modulator; noise figure 145 dB; oversampling ratio; power 2.7 mW; signal-to-quantization noise ratio; supply voltage; voltage 1.8 V; Signal to noise ratio; Switches; High Resolution ADC; Low Power; Noise Shaping; Oversampling; Sigma Delta modulation;
Conference_Titel :
Advanced Communication Control and Computing Technologies (ICACCCT), 2012 IEEE International Conference on
Conference_Location :
Ramanathapuram
Print_ISBN :
978-1-4673-2045-0
DOI :
10.1109/ICACCCT.2012.6320765