Development of 4-GHz flip-chip VCO module

This paper deals with the design issues for 4-GHz VCO implemented using flip-chip technique. A high quality passive integrated device chip is combined with a low-cost CMOS die. Two VCO topologies are selected and eight circuit variants designed. Various MOS varactor structures are compared and a loss modeling method is presented. Integrated passive device technology is presented and inductor modeling is carried out using EM-simulations. Experimental results are given for some of the measured inductors and varactors, and for the eight types of VCO modules. As an example, one circuit candidate covers 3.6-4.2 GHz with phase noise of -125 dBc/Hz@1MHz offset, provides 0 dBm output power and the core oscillator draws 5 mA from a 2-V supply.