DocumentCode
3545686
Title
Issues in low-power design for telecom
Author
Vanoostende, Paul ; Van Wauwe, Geert
Author_Institution
Adv. CAD for VLSI, Alcatel-Bell, Antwerpen, Belgium
fYear
1995
fDate
18-22 Sep 1995
Firstpage
591
Lastpage
593
Abstract
This paper studies the importance of the different contributions to the power of telecom ASICs, comparing results for 0.5 μm and 0.7 μm designs. As a result, library development, in particular for RAMs, is identified as a key challenge to obtain low-power ASICs
Keywords
application specific integrated circuits; ASICs; RAMs; library development; low-power ASICs; low-power design; telecom; Application specific integrated circuits; Clocks; Design automation; Electronics cooling; Flip-flops; Libraries; Logic gates; Telecommunications; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1995, with EURO-VHDL, Proceedings EURO-DAC '95., European
Conference_Location
Brighton
Print_ISBN
0-8186-7156-4
Type
conf
DOI
10.1109/EURDAC.1995.527466
Filename
527466
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