Title :
A novel switched-current phase locked loop
Author :
Wilcock, Reuben ; Wilson, Peter ; Al-Hashimi, Bashir M.
Author_Institution :
Sch. of Electron. & Comput. Sci., Southampton Univ., UK
Abstract :
The paper investigates the design of phase locked loops (PLLs) using the switched current (SI) technique and proposes a novel 2nd order PLL architecture that does not require an explicit phase detector, unlike conventional PLL circuits. Simulated results based on 0.35 μm BSim3v3 CMOS models of two PLL designs (10 MHz FSK demodulator, 500 MHz frequency synthesizer) are included.
Keywords :
CMOS integrated circuits; demodulators; frequency shift keying; frequency synthesizers; integrated circuit design; mixed analogue-digital integrated circuits; phase locked loops; switched current circuits; 0.35 micron; 10 MHz; 500 MHz; CMOS models; FSK demodulator; PLL; frequency synthesizer; mixed-signal IC; phase detector; switched-current phase locked loop; CMOS technology; Clocks; Demodulation; Detectors; Frequency shift keying; Frequency synthesizers; Phase detection; Phase locked loops; Switching circuits; Voltage;
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
DOI :
10.1109/ISCAS.2005.1465212
