Optimal two-dimension common centroid layout generation for MOS transistors unit-circuit

A general algorithm for fitting arbitrary channel width transistors in a two-dimensional common centroid MOS transistor matrix is presented. The proposed algorithm guarantees the layout of the transistor unit-circuit not only to be complete common centroid, but also optimal in all the common centroid structures. A novel channel routing algorithm to implement common centroid routing is also proposed. Feasibility of the algorithm is demonstrated by practical analog transistor unit-circuits.