Title :
A 24 GHz dual-modulus prescaler in 90 nm CMOS
Author :
Wohlmuth, Hans-Dieter ; Kehrer, Daniel
Author_Institution :
Corporate Res., INFINEON Technol. AG, Munich, Germany
Abstract :
We present a completely integrated 24 GHz prescaler with programmable division ratios of /4 and /5. The prescaler uses high speed differential current mode logic. AND-gates are merged with flip-flops for low power consumption and minimum gate delay. Broadband static operation up 24 GHz is achieved with on-chip shunt peaking inductors in the flipflops. A broadband output buffer is included in the circuit to drive 50 Ω loads. The circuit draws 49 mA from a single 1.2 V supply. With a reduced supply voltage of 0.9 V the maximum operating frequency of the prescaler is 22 GHz and the total power dissipation is 27 mW. The circuit is manufactured in 90 nm bulk CMOS technology.
Keywords :
CMOS logic circuits; buffer circuits; current-mode logic; delays; dividing circuits; electric potential; flip-flops; inductors; integrated circuit design; logic gates; power consumption; prescalers; 0.9 V; 1.2 V; 22 GHz; 24 GHz; 27 mW; 49 mA; 90 nm; AND-gates; CMOS; broadband output buffer; dual-modulus prescaler; flip-flops; gate delay; high speed differential current mode logic; inductor design; power consumption; programmable division ratios; CMOS logic circuits; CMOS technology; Delay; Energy consumption; Flip-flops; Frequency; Inductors; Power dissipation; Shunt (electrical); Voltage;
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
DOI :
10.1109/ISCAS.2005.1465315