DocumentCode :
3546847
Title :
Experimental gigabit multidrop serial backplane for high speed digital systems
Author :
Tobajas, Félix ; Esper-Chaín, Roberto ; Tubío, Óscar ; Arteaga, Rubén ; De Armas, Valentín ; Sarmiento, Roberto
Author_Institution :
Dept. of Electron. Eng. & Control, Univ. of Las Palmas de Gran Canaria, Spain
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
3821
Abstract :
Maximum data rate in today´s available multidrop backplanes is limited to 400 Mbps due to signal integrity concerns. In this paper, an experimental gigabit multidrop serial backplane for high-speed digital systems based on a novel asymmetrical broadband power splitter configuration with matching trace impedance, is presented. Experimental results obtained from constructed prototype demonstrate a satisfactory operation of the proposed multidrop serial backplane for a data transfer rate of 3 Gbps.
Keywords :
data communication equipment; digital communication; electronic equipment testing; impedance matching; power dividers; system buses; 3 Gbit/s; 400 Mbit/s; asymmetrical broadband power splitter configuration; data transfer rate; gigabit multidrop serial backplane; high speed digital systems; high-speed digital systems; matching trace impedance; maximum data rate; multidrop backplanes; prototype; signal integrity; Backplanes; Connectors; Digital systems; Fabrics; Impedance; Integrated circuit interconnections; Power transmission lines; Printed circuits; Prototypes; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1465463
Filename :
1465463
Link To Document :
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